Electronic systems can include data converters such as analog-to-digital (A/D) converters (ADCs) and digital-to-analog (D/A) converters (DACs). Some ADCs and DACs are used with phased locked loop (PLL) circuits that provide timing signals for operation of the data converters. Performance of data converters can be adversely affected by non-idealities in PLL circuits. For example, the signal-to-noise ratio of data converters can be adversely affected by clock jitter of the PLL circuits. The present inventors have recognized a need for improved performance of data converters.